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[all] Standardise casing to camelCasing

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Standardise casing in all files from all important functions to
    camelCasing, files included are:

    bus.c
    bus.h
    cartridge.c
    cartridge.h
    cpu.c
    cpu.h
main
Joaquin 3 years ago
parent cf5b2613c6
commit d388a54ac9
Signed by: puly
GPG Key ID: 9E9299CD96C65EC6
6 changed files with 124 additions and 124 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 52
      bus.c
  2. 14
      bus.h
  3. 14
      cartridge.c
  4. 20
      cartridge.h
  5. 136
      cpu.c
  6. 12
      cpu.h

52
bus.c
Unescape View File

@ -12,7 +12,7 @@ unsigned char bus[BUS_SIZE]; //this is the bus array
#include "cartridge.h" #include "cartridge.h"
word mapper_resolve_read(word address){ //info about what regions are mirrored can be found on the nes dev wiki word mapperResolveRead(word address){ //info about what regions are mirrored can be found on the nes dev wiki
if(address <= 0x1FFF && address >= 0x0800) if(address <= 0x1FFF && address >= 0x0800)
address %= 0x0800; address %= 0x0800;
@ -23,7 +23,7 @@ word mapper_resolve_read(word address){ //info about what regions are mirrored c
return address; return address;
} }
word mapper_resolve_write(word address, byte data){ //info about what regions are mirrored can be found on the nes dev wiki word mapperResolveWrite(word address, byte data){ //info about what regions are mirrored can be found on the nes dev wiki
if(address <= 0x1FFF && address >= 0x0800) if(address <= 0x1FFF && address >= 0x0800)
address %= 0x0800; address %= 0x0800;
@ -34,41 +34,41 @@ word mapper_resolve_write(word address, byte data){ //info about what regions ar
return address; return address;
} }
void bus_write8(word address, word data){ void busWrite8(word address, word data){
if(!mapper000_write(address, data, false)){ //first thing we do is we hand the operation to the mapper to resolve any cartridge-side bank switching and mirroring, if the address we wanna write to isnt on the cartridge, we return false and we write to the bus normally if(!mapper000_Write(address, data, false)){ //first thing we do is we hand the operation to the mapper to resolve any cartridge-side bank switching and mirroring, if the address we wanna write to isnt on the cartridge, we return false and we write to the bus normally
address = mapper_resolve_write(address, data); //a lot of regions on the NES bus are mirrored/synced, this just ensures we are always writing to the parent region, not to a empty cloned one address = mapperResolveWrite(address, data); //a lot of regions on the NES bus are mirrored/synced, this just ensures we are always writing to the parent region, not to a empty cloned one
#ifdef DEBUG #ifdef DEBUG
printf("\nwrite-ram at 0x%04X val = 0x%04X\n; old_val 0x%04X", address, data, bus_read8(address)); printf("\nwrite-ram at 0x%04X val = 0x%04X\n; old_val 0x%04X", address, data, busRead8(address));
#endif #endif
bus[address] = (unsigned char)data; bus[address] = (unsigned char)data;
} }
} }
word bus_read8(word address){ word busRead8(word address){
word data; word data;
if((data = mapper000_read(address, false)) >= 0x100){ //we first ask the mapper to read the data from the address for us in case its on the cartridge, if it returns 0x100 (0xFF + 1 aka impossible to get from reading a byte) that means the data stored at that address is not on the cartridge, but rather on the nes memory, thus we hand the job over to the bus if((data = mapper000_Read(address, false)) >= 0x100){ //we first ask the mapper to read the data from the address for us in case its on the cartridge, if it returns 0x100 (0xFF + 1 aka impossible to get from reading a byte) that means the data stored at that address is not on the cartridge, but rather on the nes memory, thus we hand the job over to the bus
address = mapper_resolve_read(address); //a lot of regions on the NES bus are mirrored/synced, this just ensures we are always writing to the parent region, not to a empty cloned one address = mapperResolveRead(address); //a lot of regions on the NES bus are mirrored/synced, this just ensures we are always writing to the parent region, not to a empty cloned one
return bus[address]; return bus[address];
}else{ }else{
return data; return data;
} }
} }
word bus_read16(word address){ word busRead16(word address){
word d = bus_read8(address+1); //read msb word d = busRead8(address+1); //read msb
d <<= 8; //put msb in the msb section d <<= 8; //put msb in the msb section
d |= bus_read8(address); //read lsb d |= busRead8(address); //read lsb
return d; //return whole word return d; //return whole word
} }
void bus_write16(word address, word data){ void busWrite16(word address, word data){
bus_write8(address, data >> 8); //write msb busWrite8(address, data >> 8); //write msb
bus_write8(address + 1, data & 0b00001111); //write lsb busWrite8(address + 1, data & 0b00001111); //write lsb
} }
void dump_bus(){ void dumpBus(){
FILE *fdump; FILE *fdump;
fdump = fopen("dumpfile", "w"); fdump = fopen("dumpfile", "w");
@ -81,7 +81,7 @@ void dump_bus(){
//If the file was successfuly opened then this code will run //If the file was successfuly opened then this code will run
for(unsigned long long i = 0; i <= 0xFFFF; i++) for(unsigned long long i = 0; i <= 0xFFFF; i++)
fprintf(fdump, "%c", bus_read8(i)); fprintf(fdump, "%c", busRead8(i));
} }
byte debug_read_do_not_use_pls(word address){ byte debug_read_do_not_use_pls(word address){
@ -111,7 +111,7 @@ int main(int argc, char * argv[]){
} }
#endif #endif
init_cpu(cpu); //put new CPU in starting mode and dock it to the bus initCpu(cpu); //put new CPU in starting mode and dock it to the bus
cpu->PC = PROG_START_ADDR; cpu->PC = PROG_START_ADDR;
if(argc <= 1){ //Check to see if a rom was given if(argc <= 1){ //Check to see if a rom was given
@ -120,12 +120,12 @@ int main(int argc, char * argv[]){
} }
//load the CHR and PRG banks from the .nes file (argv[1]), also loads the header for mapper construction //load the CHR and PRG banks from the .nes file (argv[1]), also loads the header for mapper construction
init_banks(argv[1]); initBanks(argv[1]);
#ifdef DEBUG #ifdef DEBUG
//Test to see if writing to the bus is working correctly //Test to see if writing to the bus is working correctly
bus_write8(0x0000, 0xFF); busWrite8(0x0000, 0xFF);
printf("\n---- ---- %02X %02X\n", bus_read8(0x0000), bus[0x0000]); printf("\n---- ---- %02X %02X\n", busRead8(0x0000), bus[0x0000]);
//open debug PC logfile //open debug PC logfile
@ -137,17 +137,17 @@ int main(int argc, char * argv[]){
#ifdef DEBUG #ifdef DEBUG
fprintf(PClogFILE, "%4X\n", cpu->PC); fprintf(PClogFILE, "%4X\n", cpu->PC);
debug_print_instruction(cpu, bus_read8(cpu->PC)); debug_print_instruction(cpu, busRead8(cpu->PC));
print_registers(cpu); printRegisters(cpu);
print_cpu(cpu); printCpu(cpu);
fprintf(stderr, "\n\n----\n%i\n-----", iterations); fprintf(stderr, "\n\n----\n%i\n-----", iterations);
#endif #endif
//RUN THE CPU CLOCK ONE TIME //RUN THE CPU CLOCK ONE TIME
cpu_clock(cpu); cpuClock(cpu);
} }
#ifdef DEBUG #ifdef DEBUG
dump_bus(); dumpBus();
#endif #endif
} }

14
bus.h
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@ -7,11 +7,11 @@
byte debug_read_do_not_use_pls(word address); byte debug_read_do_not_use_pls(word address);
void bus_write8(word address, word data); void busWrite8(word address, word data);
word bus_read8(word adress); word busRead8(word adress);
word bus_read16(word address); word busRead16(word address);
void bus_write16(word address, word data); void busWrite16(word address, word data);
void dump_bus();
word mapper_resolve(word address); //gets defined in the cartridge mapper circuit code bcuz it differs from cart to cart
void dumpBus();
word mapperResolveRead(word address); //gets defined in the cartridge mapper circuit code bcuz it differs from cart to cart
word mapperResolveWrite(word address, byte data);

14
cartridge.c
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@ -7,10 +7,10 @@ byte CHRROM[0xFFFF];
word not_handling_this = 0x100; //0xFF + 1 word not_handling_this = 0x100; //0xFF + 1
void load_romfile_header(FILE * romfile){ void loadRomfileHeader(FILE * romfile){
byte verification_token[3] = "NES"; byte verificationToken[3] = "NES";
for(byte i = 0; i < 3; i++) for(byte i = 0; i < 3; i++)
if(verification_token[i] != getc(romfile)) return; if(verificationToken[i] != getc(romfile)) return;
getc(romfile); //get over the DOS EOF byte getc(romfile); //get over the DOS EOF byte
Header.PRG_BANKS = getc(romfile); Header.PRG_BANKS = getc(romfile);
Header.CHR_BANKS = getc(romfile); Header.CHR_BANKS = getc(romfile);
@ -20,7 +20,7 @@ void load_romfile_header(FILE * romfile){
} }
} }
void init_banks(char name[]){ void initBanks(char name[]){
FILE * romfile; FILE * romfile;
romfile = fopen(name, "r"); romfile = fopen(name, "r");
@ -31,7 +31,7 @@ void init_banks(char name[]){
} }
#endif #endif
load_romfile_header(romfile); loadRomfileHeader(romfile);
if(Header.flags.flag6.trainer) //if trainer data if(Header.flags.flag6.trainer) //if trainer data
fseek(romfile, 512, SEEK_CUR); fseek(romfile, 512, SEEK_CUR);
@ -48,7 +48,7 @@ void init_banks(char name[]){
fclose(romfile); fclose(romfile);
} }
word mapper000_read(word address, bool ppu){ word mapper000_Read(word address, bool ppu){
if(!ppu){ //if not ppu talking if(!ppu){ //if not ppu talking
if(!((address <= 0xFFFF) && (address >= 0x8000))){ //if not in the address range the mapper functions in if(!((address <= 0xFFFF) && (address >= 0x8000))){ //if not in the address range the mapper functions in
return not_handling_this; //not_handling_this is a 16 bit data integer, no byte will return this ever so this is our "not handling this" return code return not_handling_this; //not_handling_this is a 16 bit data integer, no byte will return this ever so this is our "not handling this" return code
@ -66,6 +66,6 @@ word mapper000_read(word address, bool ppu){
} }
} }
bool mapper000_write(word address, byte data, bool ppu){ bool mapper000_Write(word address, byte data, bool ppu){
return false; //no PRGRAM configured in this cartridge, so all writes get denied return false; //no PRGRAM configured in this cartridge, so all writes get denied
}; };

20
cartridge.h
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@ -29,21 +29,21 @@ enum FLAG9_TV_MODE{
typedef union { typedef union {
struct{ struct{
struct { struct {
byte mirroring_mode : 1; byte mirroringMode : 1;
byte battery : 1; byte battery : 1;
byte trainer : 1; byte trainer : 1;
byte disable_mirroring : 1; byte disableMirroring : 1;
byte lower_mapper_number : 4; byte lowerMapperNumber : 4;
}flag6; }flag6;
struct { struct {
byte unisystem : 1; byte unisystem : 1;
byte play_choice_10 : 1; byte playChoice10 : 1;
byte INes_version : 2; byte INes_version : 2;
byte disable_mirroring : 1; byte disableMirroring : 1;
byte upper_mapper_number : 4; byte upperMapperNumber : 4;
}flag7; }flag7;
struct { struct {
@ -51,7 +51,7 @@ typedef union {
}flag8; }flag8;
struct { struct {
byte tv_mode : 1; byte tvMode : 1;
byte padding : 7; byte padding : 7;
}flag9; }flag9;
}; };
@ -70,8 +70,8 @@ typedef struct{
}HEADER; }HEADER;
void init_banks(char * fn); void initBanks(char * fn);
word mapper000_read(word address, bool ppu); word mapper000_Read(word address, bool ppu);
bool mapper000_write(word address, byte data, bool ppu); bool mapper000_Write(word address, byte data, bool ppu);

136
cpu.c
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@ -43,7 +43,7 @@ busTransaction ACC(CPU * __restrict__ cpu, word bytes){
busTransaction ZPG(CPU * __restrict__ cpu, word bytes){ busTransaction ZPG(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
x.address = bytes; x.address = bytes;
x.value = bus_read8(bytes); x.value = busRead8(bytes);
return x; return x;
} }
@ -51,7 +51,7 @@ busTransaction ZPGX(CPU * __restrict__ cpu, word bytes){ //not code related, but
busTransaction x; busTransaction x;
bytes += cpu->X; bytes += cpu->X;
x.address = bytes; x.address = bytes;
x.value = bus_read8(bytes); x.value = busRead8(bytes);
return x; return x;
} }
@ -59,21 +59,21 @@ busTransaction ZPGY(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
bytes += cpu->Y; bytes += cpu->Y;
x.address = bytes; x.address = bytes;
x.value = bus_read8(bytes); x.value = busRead8(bytes);
return x; return x;
} }
busTransaction REL(CPU * __restrict__ cpu, word bytes){ busTransaction REL(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
x.address = cpu->PC + (byte)bytes; x.address = cpu->PC + (byte)bytes;
x.value = bus_read8(x.address); x.value = busRead8(x.address);
return x; return x;
} }
busTransaction ABS(CPU * __restrict__ cpu, word bytes){ busTransaction ABS(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
x.address = bytes; x.address = bytes;
x.value = bus_read8(bytes); x.value = busRead8(bytes);
return x; return x;
} }
@ -81,7 +81,7 @@ busTransaction ABSX(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
bytes += cpu->X; bytes += cpu->X;
x.address = bytes; x.address = bytes;
x.value = bus_read8(bytes); x.value = busRead8(bytes);
return x; return x;
} }
@ -89,13 +89,13 @@ busTransaction ABSY(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
bytes += cpu->Y; bytes += cpu->Y;
x.address = bytes; x.address = bytes;
x.value = bus_read8(bytes); x.value = busRead8(bytes);
return x; return x;
} }
busTransaction IND(CPU * __restrict__ cpu, word bytes){ busTransaction IND(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
x.address = bus_read16(bytes); x.address = busRead16(bytes);
//BAD CODE INCOMING: //BAD CODE INCOMING:
//ok so there is an exception JMP(6C) makes that, from the way I //ok so there is an exception JMP(6C) makes that, from the way I
@ -113,13 +113,13 @@ busTransaction IND(CPU * __restrict__ cpu, word bytes){
//Signed, Joaquin //Signed, Joaquin
if((bytes & 0x00FF) == 0xFF){ if((bytes & 0x00FF) == 0xFF){
x.address = bus_read8(bytes) | (bus_read8(bytes - 0xFF) << 8); x.address = busRead8(bytes) | (busRead8(bytes - 0xFF) << 8);
} }
x.value = bus_read8(x.address); x.value = busRead8(x.address);
#ifdef DEBUG #ifdef DEBUG
printf("\nIND: X>ADDRESS %04X | X>VALUE %04X | BYTES %04X | BUS_READ8(BYTES) %04X | BUS_READ16{BYTES} %04X | BUS_READ8(BYTES+1) %04X | BUS_READ8(BYTES-1) %04X | BUS_READ8(BYTES - 0xFF) %04X\n", x.address, x.value, bytes, bus_read8(bytes), bus_read16(bytes), bus_read8(bytes + 1), bus_read8(bytes - 1), bus_read8(bytes - 0xFF)); printf("\nIND: X>ADDRESS %04X | X>VALUE %04X | BYTES %04X | busRead8(BYTES) %04X | busRead16{BYTES} %04X | busRead8(BYTES+1) %04X | busRead8(BYTES-1) %04X | busRead8(BYTES - 0xFF) %04X\n", x.address, x.value, bytes, busRead8(bytes), busRead16(bytes), busRead8(bytes + 1), busRead8(bytes - 1), busRead8(bytes - 0xFF));
#endif #endif
return x; return x;
@ -128,8 +128,8 @@ busTransaction IND(CPU * __restrict__ cpu, word bytes){
busTransaction INDX(CPU * __restrict__ cpu, word bytes){ busTransaction INDX(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
x.address = bus_read8((bytes + cpu->X) % 256) + bus_read8((bytes + cpu->X + 1) % 256) * 256; x.address = busRead8((bytes + cpu->X) % 256) + busRead8((bytes + cpu->X + 1) % 256) * 256;
x.value = bus_read8(x.address); x.value = busRead8(x.address);
return x; return x;
} }
@ -137,8 +137,8 @@ busTransaction INDX(CPU * __restrict__ cpu, word bytes){
busTransaction INDY(CPU * __restrict__ cpu, word bytes){ busTransaction INDY(CPU * __restrict__ cpu, word bytes){
busTransaction x; busTransaction x;
x.address = bus_read8(bytes) + bus_read8((bytes + 1) % 256) * 256 + cpu->Y; x.address = busRead8(bytes) + busRead8((bytes + 1) % 256) * 256 + cpu->Y;
x.value = bus_read8(x.address); x.value = busRead8(x.address);
return x; return x;
} }
@ -170,7 +170,7 @@ void ASL(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *,
if(addressing == &ACC) if(addressing == &ACC)
cpu->A = x.value; cpu->A = x.value;
else else
bus_write8(x.address, x.value); busWrite8(x.address, x.value);
cpu->SR.flags.Zero = !x.value; cpu->SR.flags.Zero = !x.value;
cpu->SR.flags.Negative = x.value >> 7; cpu->SR.flags.Negative = x.value >> 7;
@ -193,18 +193,18 @@ void BRK(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ //0
pcMsb = cpu->PC >> 8; pcMsb = cpu->PC >> 8;
pcLsb = cpu->PC & 0x00FF; pcLsb = cpu->PC & 0x00FF;
bus_write8(cpu->SP + STACK_RAM_OFFSET, pcMsb); busWrite8(cpu->SP + STACK_RAM_OFFSET, pcMsb);
cpu->SP--; cpu->SP--;
bus_write8(cpu->SP + STACK_RAM_OFFSET, pcLsb); busWrite8(cpu->SP + STACK_RAM_OFFSET, pcLsb);
cpu->SP--; cpu->SP--;
cpu->SR.flags.Break = 1; cpu->SR.flags.Break = 1;
bus_write8(cpu->SP + STACK_RAM_OFFSET, cpu->SR.data); busWrite8(cpu->SP + STACK_RAM_OFFSET, cpu->SR.data);
cpu->SP--; cpu->SP--;
cpu->SR.flags.Break = 0; cpu->SR.flags.Break = 0;
word newPC = (bus_read8(0xFFFF) << 8); //read MSB word newPC = (busRead8(0xFFFF) << 8); //read MSB
newPC |= bus_read8(0xFFFE); //read LSB newPC |= busRead8(0xFFFE); //read LSB
cpu->PC = newPC; cpu->PC = newPC;
} }
@ -213,7 +213,7 @@ void PHP(CPU* cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ //0x
cpu->SR.flags.Break = 1; cpu->SR.flags.Break = 1;
cpu->SR.flags.ignored = 1; cpu->SR.flags.ignored = 1;
bus_write8(cpu->SP + STACK_RAM_OFFSET, cpu->SR.data); busWrite8(cpu->SP + STACK_RAM_OFFSET, cpu->SR.data);
cpu->SP--; cpu->SP--;
cpu->SR.flags.Break = 0; cpu->SR.flags.Break = 0;
@ -242,9 +242,9 @@ void JSR(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ //J
pcMsb = cpu->PC >> 8; pcMsb = cpu->PC >> 8;
pcLsb = cpu->PC & 0x00FF; pcLsb = cpu->PC & 0x00FF;
bus_write8(cpu->SP + STACK_RAM_OFFSET, pcMsb); busWrite8(cpu->SP + STACK_RAM_OFFSET, pcMsb);
cpu->SP--; cpu->SP--;
bus_write8(cpu->SP + STACK_RAM_OFFSET, pcLsb); busWrite8(cpu->SP + STACK_RAM_OFFSET, pcLsb);
cpu->SP--; cpu->SP--;
cpu->PC = x.address; cpu->PC = x.address;
@ -263,7 +263,7 @@ void BIT(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
void PLP(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void PLP(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
cpu->SP++; cpu->SP++;
cpu->SR.data = bus_read8(cpu->SP + STACK_RAM_OFFSET); cpu->SR.data = busRead8(cpu->SP + STACK_RAM_OFFSET);
cpu->SR.flags.Break = 0; cpu->SR.flags.Break = 0;
cpu->SR.flags.ignored = 1; cpu->SR.flags.ignored = 1;
@ -274,7 +274,7 @@ void PLP(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
void PLA(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void PLA(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
cpu->SP++; cpu->SP++;
cpu->A = bus_read8(cpu->SP + STACK_RAM_OFFSET); cpu->A = busRead8(cpu->SP + STACK_RAM_OFFSET);
cpu->SR.flags.Negative = cpu->A > 7; cpu->SR.flags.Negative = cpu->A > 7;
cpu->SR.flags.Zero = !cpu->A; cpu->SR.flags.Zero = !cpu->A;
@ -294,7 +294,7 @@ void ROL(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *,
if(addressing == &ACC) if(addressing == &ACC)
cpu->A = x.value; cpu->A = x.value;
else bus_write8(x.address, x.value); else busWrite8(x.address, x.value);
cpu->SR.flags.Carry = new_carry; cpu->SR.flags.Carry = new_carry;
} }
@ -352,7 +352,7 @@ void ROR(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
if(addressing == &ACC) if(addressing == &ACC)
cpu->A = x.value; cpu->A = x.value;
else bus_write8(x.address, x.value); else busWrite8(x.address, x.value);
} }
void CLD(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void CLD(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
@ -454,7 +454,7 @@ void DEC(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *,
busTransaction x = addressing(cpu, bytes); //check line 85 for details busTransaction x = addressing(cpu, bytes); //check line 85 for details
x.value--; x.value--;
//TODO: Does this need an ACC option? //TODO: Does this need an ACC option?
bus_write8(x.address, x.value); busWrite8(x.address, x.value);
cpu->SR.flags.Negative = (x.value >> 7); cpu->SR.flags.Negative = (x.value >> 7);
cpu->SR.flags.Zero = (x.value == 0); cpu->SR.flags.Zero = (x.value == 0);
} }
@ -473,7 +473,7 @@ void DEY(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
void INC(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void INC(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
busTransaction x = addressing(cpu, bytes); //check line 85 for details busTransaction x = addressing(cpu, bytes); //check line 85 for details
bus_write8(x.address, x.value + 1); busWrite8(x.address, x.value + 1);
cpu->SR.flags.Zero = !x.value; cpu->SR.flags.Zero = !x.value;
cpu->SR.flags.Negative = x.value >> 7; cpu->SR.flags.Negative = x.value >> 7;
} }
@ -540,7 +540,7 @@ void LSR(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *,
if(addressing == &ACC){ if(addressing == &ACC){
cpu->A = new_val; cpu->A = new_val;
} else { } else {
bus_write8(x.address, new_val); busWrite8(x.address, new_val);
} }
cpu->SR.flags.Carry = (x.value & 0b00000001); cpu->SR.flags.Carry = (x.value & 0b00000001);
@ -553,7 +553,7 @@ void NOP(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *,
} }
void PHA(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void PHA(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
bus_write8(cpu->SP + STACK_RAM_OFFSET, cpu->A); busWrite8(cpu->SP + STACK_RAM_OFFSET, cpu->A);
cpu->SP--; cpu->SP--;
#ifdef DEBUG #ifdef DEBUG
@ -564,14 +564,14 @@ void PHA(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *,
void RTI(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void RTI(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
cpu->pcNeedsInc = false; cpu->pcNeedsInc = false;
cpu->SP++; cpu->SP++;
cpu->SR.data = bus_read8(cpu->SP + STACK_RAM_OFFSET); cpu->SR.data = busRead8(cpu->SP + STACK_RAM_OFFSET);
cpu->SR.flags.ignored = 1; cpu->SR.flags.ignored = 1;
cpu->SP++; cpu->SP++;
word newPC = bus_read8(cpu->SP + STACK_RAM_OFFSET); //read lsb word newPC = busRead8(cpu->SP + STACK_RAM_OFFSET); //read lsb
cpu->SP++; cpu->SP++;
newPC |= bus_read8(cpu->SP + STACK_RAM_OFFSET) << 8; //read msb newPC |= busRead8(cpu->SP + STACK_RAM_OFFSET) << 8; //read msb
cpu->PC = newPC; cpu->PC = newPC;
@ -583,14 +583,14 @@ void RTI(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
void RTS(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void RTS(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
cpu->SP++; cpu->SP++;
word newPC = bus_read8(cpu->SP + STACK_RAM_OFFSET); word newPC = busRead8(cpu->SP + STACK_RAM_OFFSET);
#ifdef DEBUG #ifdef DEBUG
printf("\n%02X\n", newPC); printf("\n%02X\n", newPC);
#endif #endif
cpu->SP++; cpu->SP++;
newPC |= bus_read8(cpu->SP + STACK_RAM_OFFSET) << 8; newPC |= busRead8(cpu->SP + STACK_RAM_OFFSET) << 8;
#ifdef DEBUG #ifdef DEBUG
printf("\n%04X\n", newPC); printf("\n%04X\n", newPC);
@ -632,17 +632,17 @@ void SED(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *,
void STA(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void STA(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
busTransaction x = addressing(cpu, bytes); //check line 85 for details busTransaction x = addressing(cpu, bytes); //check line 85 for details
bus_write8(x.address, cpu->A); busWrite8(x.address, cpu->A);
} }
void STX(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void STX(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
busTransaction x = addressing(cpu, bytes); //check line 85 for details busTransaction x = addressing(cpu, bytes); //check line 85 for details
bus_write8(x.address, cpu->X); busWrite8(x.address, cpu->X);
} }
void STY(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void STY(CPU * __restrict__ cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
busTransaction x = addressing(cpu, bytes); //check line 85 for details busTransaction x = addressing(cpu, bytes); //check line 85 for details
bus_write8(x.address, cpu->Y); busWrite8(x.address, cpu->Y);
} }
void TAX(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){ void TAX(CPU * cpu, word bytes, busTransaction (*addressing)(CPU *, word) ){
@ -1764,7 +1764,7 @@ void init_opcodereg(CPU * cpu){ //opcode code defined starting line 139
cpu->opcodes[0x60].bytes = 1; cpu->opcodes[0x60].bytes = 1;
} }
void print_registers(CPU * __restrict__ cpu){ void printRegisters(CPU * __restrict__ cpu){
printf("N: %i\n", cpu->SR.flags.Negative); printf("N: %i\n", cpu->SR.flags.Negative);
printf("V: %i\n", cpu->SR.flags.Overflow); printf("V: %i\n", cpu->SR.flags.Overflow);
printf("B: %i\n", cpu->SR.flags.Break); printf("B: %i\n", cpu->SR.flags.Break);
@ -1775,7 +1775,7 @@ void print_registers(CPU * __restrict__ cpu){
} }
void print_cpu(CPU * __restrict__ cpu){ void printCpu(CPU * __restrict__ cpu){
#define BYTE_TO_BINARY_PATTERN "%c%c%c%c%c%c%c%c" #define BYTE_TO_BINARY_PATTERN "%c%c%c%c%c%c%c%c"
#define BYTE_TO_BINARY(byte_) \ #define BYTE_TO_BINARY(byte_) \
(byte_ & 0x80 ? '1' : '0'), \ (byte_ & 0x80 ? '1' : '0'), \
@ -1801,7 +1801,7 @@ void print_cpu(CPU * __restrict__ cpu){
} }
void raise_error(unsigned int err, CPU * __restrict__ cpu){ void raiseError(unsigned int err, CPU * __restrict__ cpu){
const char * ERROR_STR[13]= { const char * ERROR_STR[13]= {
"Unknown Error", "Unknown Error",
"Tried to access a opcode that doesn't exist", "Tried to access a opcode that doesn't exist",
@ -1821,10 +1821,10 @@ void raise_error(unsigned int err, CPU * __restrict__ cpu){
fprintf(stderr, "%s", ERROR_STR[err]); fprintf(stderr, "%s", ERROR_STR[err]);
fprintf(stderr, "CRASH!!!!\n\n"); fprintf(stderr, "CRASH!!!!\n\n");
fprintf(stderr, "\tLOCATION: %#06x\n", cpu->PC); fprintf(stderr, "\tLOCATION: %#06x\n", cpu->PC);
fprintf(stderr, "\tOPCODE: %#06x\n", bus_read8(cpu->PC)); fprintf(stderr, "\tOPCODE: %#06x\n", busRead8(cpu->PC));
fprintf(stderr, "\tNAME: \"%s\"\n", cpu->opcodes[bus_read8(cpu->PC)].name); fprintf(stderr, "\tNAME: \"%s\"\n", cpu->opcodes[busRead8(cpu->PC)].name);
fprintf(stderr, "\tMICRO: %p\n", cpu->opcodes[bus_read8(cpu->PC)].microcode); fprintf(stderr, "\tMICRO: %p\n", cpu->opcodes[busRead8(cpu->PC)].microcode);
fprintf(stderr, "\tMODE: %p\n", cpu->opcodes[bus_read8(cpu->PC)].mode); fprintf(stderr, "\tMODE: %p\n", cpu->opcodes[busRead8(cpu->PC)].mode);
exit(err); exit(err);
} }
@ -1836,14 +1836,14 @@ void print_stack(CPU * __restrict__ cpu){
x[0] = '['; x[0] = '[';
x[1] = ']'; x[1] = ']';
} }
printf(" %c%02X%c ", x[0], bus_read8(i), x[1]); printf(" %c%02X%c ", x[0], busRead8(i), x[1]);
x[0] = '.'; x[0] = '.';
x[1] = '.'; x[1] = '.';
} }
printf("\n"); printf("\n");
} }
void handle_errors(CPU * __restrict__ cpu){ void handleErrors(CPU * __restrict__ cpu){
enum ERRORS{ enum ERRORS{
NORMAL, NORMAL,
OPCODES_OB, OPCODES_OB,
@ -1862,44 +1862,44 @@ void handle_errors(CPU * __restrict__ cpu){
if(cpu == NULL){ if(cpu == NULL){
raise_error(UNALLOC_CPU, cpu); raiseError(UNALLOC_CPU, cpu);
} }
if(cpu->PC > BUS_SIZE){ if(cpu->PC > BUS_SIZE){
raise_error(BUS_OB, cpu); raiseError(BUS_OB, cpu);
} }
if(cpu->opcodes == NULL){ if(cpu->opcodes == NULL){
raise_error(UNALLOC_OP, cpu); raiseError(UNALLOC_OP, cpu);
} }
struct instruction cur_inst = cpu->opcodes[bus_read8(cpu->PC)]; struct instruction cur_inst = cpu->opcodes[busRead8(cpu->PC)];
if(cur_inst.microcode == NULL){ if(cur_inst.microcode == NULL){
raise_error(UNALLOC_MICRO, cpu); raiseError(UNALLOC_MICRO, cpu);
} }
if(cur_inst.mode == NULL){ if(cur_inst.mode == NULL){
raise_error(UNALLOC_MODE, cpu); raiseError(UNALLOC_MODE, cpu);
} }
if(cur_inst.name == NULL){ if(cur_inst.name == NULL){
raise_error(UNALLOC_NAME, cpu); raiseError(UNALLOC_NAME, cpu);
} }
if(cur_inst.cycles == 0){ if(cur_inst.cycles == 0){
raise_error(UNKNOWN_CYCLES, cpu); raiseError(UNKNOWN_CYCLES, cpu);
} }
if(cur_inst.bytes == 0){ if(cur_inst.bytes == 0){
raise_error(UNKNOWN_BYTES, cpu); raiseError(UNKNOWN_BYTES, cpu);
} }
if(cur_inst.microcode < ORA || cur_inst.microcode > TYA){ if(cur_inst.microcode < ORA || cur_inst.microcode > TYA){
raise_error(UNKNOWN_MICRO, cpu); raiseError(UNKNOWN_MICRO, cpu);
} }
printf("OP: %x\n", bus_read8(cpu->PC)); printf("OP: %x\n", busRead8(cpu->PC));
} }
/*void printErrorCodes(CPU * cpu){ /*void printErrorCodes(CPU * cpu){
printf("0x02 = %02X, 0x03 = %03X\n", ) printf("0x02 = %02X, 0x03 = %03X\n", )
}*/ }*/
void init_cpu(CPU * __restrict__ cpu){ void initCpu(CPU * __restrict__ cpu){
cpu->PC = 0; cpu->PC = 0;
cpu->A = 0; cpu->A = 0;
cpu->X = 0; cpu->X = 0;
@ -1910,28 +1910,28 @@ void init_cpu(CPU * __restrict__ cpu){
init_opcodereg(cpu);//import the stuff about each microcode, stuff like bytes per instruction, cycles, adressing mode, and operation in the array, where the value in the array is the byte that triggers that action for the CPU init_opcodereg(cpu);//import the stuff about each microcode, stuff like bytes per instruction, cycles, adressing mode, and operation in the array, where the value in the array is the byte that triggers that action for the CPU
} }
void cpu_clock(CPU * cpu){ void cpuClock(CPU * cpu){
#ifdef DEBUG #ifdef DEBUG
handle_errors(cpu); handleErrors(cpu);
#endif #endif
cpu->pcNeedsInc = true; cpu->pcNeedsInc = true;
word args = 0; word args = 0;
if(cpu->opcodes[bus_read8(cpu->PC)].bytes > 2){ //if args is 16bit shifts the first byte to the hi byte (they get reversed basically) if(cpu->opcodes[busRead8(cpu->PC)].bytes > 2){ //if args is 16bit shifts the first byte to the hi byte (they get reversed basically)
args = bus_read8(cpu->PC + 2) << 8; args = busRead8(cpu->PC + 2) << 8;
} }
args |= bus_read8(cpu->PC + 1); //add first arg byte args |= busRead8(cpu->PC + 1); //add first arg byte
#ifdef DEBUG #ifdef DEBUG
printf("\nBYTES: 0x%04X", args); printf("\nBYTES: 0x%04X", args);
#endif #endif
byte sizeOfInstruction = cpu->opcodes[bus_read8(cpu->PC)].bytes; byte sizeOfInstruction = cpu->opcodes[busRead8(cpu->PC)].bytes;
//EXECUTION HERE //EXECUTION HERE
cpu->opcodes[bus_read8(cpu->PC)].microcode(cpu, args, cpu->opcodes[bus_read8(cpu->PC)].mode); //execute opcode function cpu->opcodes[busRead8(cpu->PC)].microcode(cpu, args, cpu->opcodes[busRead8(cpu->PC)].mode); //execute opcode function
//EXECUTION DONE //EXECUTION DONE

12
cpu.h
Unescape View File

@ -58,10 +58,10 @@ struct instruction{
char cycles; char cycles;
}; };
void print_cpu(CPU * cpu); //debug functions void printCpu(CPU * cpu); //debug functions
void raise_error(unsigned int err, CPU * cpu); void raiseError(unsigned int err, CPU * cpu);
void handle_errors(CPU * cpu); void handleErrors(CPU * cpu);
void print_registers(CPU * cpu); void printRegisters(CPU * cpu);
void cpu_clock(CPU * cpu); //tick function void cpuClock(CPU * cpu); //tick function
void init_cpu(CPU * cpu); //init cpu, allocate memory for opcode register and set flags to initial state void initCpu(CPU * cpu); //init cpu, allocate memory for opcode register and set flags to initial state

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